发明名称 SYSTEM SELECTING SYSTEM
摘要 PURPOSE:To obtain a desired system selecting function, by transmitting either one of clock pulses of two frequencies to designat one of double systems and discriminating and integrating digitally the frequency of the clock pulse by a single-structure of the receiving side. CONSTITUTION:A system selection controller 3 contains two types of clock pulse sources 32 and 33. Either one of these two sources is selected and sent to a single-structure device 2 via a driver element 35 and a transformer 36. The device 2 receives the clock pulse at a receiver element 23 via a transformer 22 and leads it to a frequency discriminating circuit 24 and then to an integration circuit 25. The output of the circuit 25 delivers a system selection level signal 1 corresponding to f1 after a fixed delay time to a selector 21 only when fth2 (threshold value for significance of signal)<f<fth1 (threshold value to two frequencies f0 and f1 to be discriminated) is satisfied. The system selection level signal is set at 0 for clock pulse which are lower than fth2.
申请公布号 JPS58150334(A) 申请公布日期 1983.09.07
申请号 JP19820032406 申请日期 1982.03.03
申请人 HITACHI SEISAKUSHO KK;NIPPON DENSHIN DENWA KOSHA;OKI DENKI KOGYO KK;NIPPON DENKI KK;FUJITSU KK 发明人 HORIKI AKIRA;TSUBOI TOSHINORI;SUGAO SUSUMU;ONO CHIYUUKICHI;ITOU KAZUHIKO
分类号 G05B9/03;H04B1/74;H04Q9/10 主分类号 G05B9/03
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