| 摘要 |
PURPOSE:To attain stable operating characteristics, high speed and low power consumption, by connecting at least an FET of the 1st stage of an output buffer to a source follower. CONSTITUTION:The FET1 of the 1st stage of an output buffer, the FET2 of the final stage of the output buffer and the souce 3 of the FET2 are provided. The source 3 of the FET2 of the final stage is connected to an output drain power supply voltage terminal VDDout via capacitor 4 and a resistor 5, and the output is picked up from the source 3. In this circuit, a separate power supply for the buffer is not required and the reflection from a tansmission line 6 is prevented, by selecting a mutual conductance gm of the FET2 of the final stage suitably. |
