| 摘要 |
A monolithic integrated vertical deflection circuit for television sets is provided for digital generation of the pulse width modulated signal for directly driving a vertical deflection stage. The integrated circuit is implemented using counters, clock generators, a frequency divider, a decoder and logic gates in conjunction with programmable read only memories so that the number of rows in a first programmable read only memory may be considerably reduced. Use of the simpler digital stages results in a chip of much smaller size than required by the prior art.
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