发明名称 DYNAMIC MOS ROM
摘要 <p>PURPOSE:To make the operation high-speed and reduce the power consumption, by terminating the discharge period at the detection timing for read-out 0 data in an MOS ROM. CONSTITUTION:In case of read-out of 0 data, the potential of a data read-out line 2 starts falling, and simultaneously, the potential of a data read-out line 12 starts falling also. A sense circuit 1 discriminates 0 data by the fall of the potential of the data read-out line 2 from a level VDD to a level VS and leads out 0 data to the output, and simultaneously, a sense circuit 13 leads out the L level to the output by the fall of the potential of the data read-out line 12. When the L level is outputted from the sense circuit 13, the output of an AND circuit 14 becomes L-level, and the output (a control signal phiP1) of a delay circuit 15 becomes L-level after delayed by quantity tP1, and therefore, an N- channel MOS FET QdD for discharge becomes non-conductive to terminate the discharge period.</p>
申请公布号 JPS58141496(A) 申请公布日期 1983.08.22
申请号 JP19820022067 申请日期 1982.02.16
申请人 OKI DENKI KOGYO KK 发明人 NAKAMURA TSUNEO;MIYAZAKI KAZUHIKO
分类号 G11C17/00;G11C17/12 主分类号 G11C17/00
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