发明名称 |
Non-volatile, electrically erasable and reprogrammable memory element |
摘要 |
The invention relates to non-volatile electrically erasable and reprogrammable memories produced by CMOS technology. According to the invention, each memory element comprises only a single p-channel transistor having a polycrystalline silicon floating gate capacitively coupled to a control electrode. The thicknesses of injection oxide and gate oxide are such that the element can be programmed by avalanche of the drain-substrate junction and erased by field emission of electrons from the floating gate towards the substrate. All the voltages required can be generated on the circuit of the memory from a battery voltage of 1.5 volts.
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申请公布号 |
US4399523(A) |
申请公布日期 |
1983.08.16 |
申请号 |
US19800180488 |
申请日期 |
1980.08.22 |
申请人 |
CENTRE ELECTRONIQUE HORLOGER SA |
发明人 |
GERBER, BERNARD;FELLRATH, JEAN |
分类号 |
G11C16/04;H01L29/788;(IPC1-7):G11C11/40 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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