| 摘要 |
PURPOSE:To increase the arithmetic speed, by having correspondence between the carry-in and the borrow-out value of a subtractor circuit and then adding an inverted output and the output of a storage element to feed these outputs to the storage element. CONSTITUTION:Sequences{Xn}and{Yn}consisting of signals xi and yi of 8 bits are applied to terminals 11 and 12 respectively. An NOT is obtained for the signal Yi with each bit through an NOT circuit 5. These signals are fed to an adder circuit 1 and added together, and a difference signal of the addition result is delivered from a subtractor circuit 7. Then a carry-out signal COUT 14 is delivered. These difference signal and the carry-out signal are fed to an exclusive OR circuit 4. On the other hand, the signal COUT is fed to an NOT circuit 6, and the output of the circuit 4 is applied to an adder circuit 2 in the form of an absolute difference signal. The output of the circuit 6 is applied to the circuit 2 as a carry-in signal. Then the correspondence is obtained between the carry-in signal and the borrow-out value of the circuit 7. An inverted signal is applied to the circuit 2, and the output of the circuit 2 is fed to a storage element. |
