| 摘要 |
An address buffer circuit for comverting an address signal (Ai) of a TTL level into an address signal (A) of a MOS level an its inverted signal (A) comprising: a pre-amplifier (P-AMP) for receiving the address signal having a TTL level; a main amplifier (M-AMP) comprising a flip-flop (FF3), a circuit for defining the operation of the flip-flop (FF3); and an output circuit (OUT) comprised of another flip-flop (FF4) for producing the address signals of a MOS level. In the pre-amplifier, a depletion type transistor (Q34) is used as a reference constant current source, which is independent of a power supply voltage (VDD), for the two values of the address signal of a TTL level.
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