发明名称 |
GENERATING CIRCUIT OF CLOCK FOR PICTURE SIGNAL CODING |
摘要 |
PURPOSE:To code an optional picture signal, by securing an automatic switch between a synchronous sampling clock with a picture signal having the synchronous frequency accuracy set within the prescribed standard and a non-synchronous sampling clock with a picture signal having said frequency accuracy set outside the prescribed standard. CONSTITUTION:The picture signal supplied through a picture signal input terminal 1 is supplied to a synchronous separating circuit 2, and the horizontal synchronous signal is separated and supplied to a phase locked oscillating circuit 3. The circuit 3 produces the clock which is locked with the horizontal signal in terms of phase and delivers it to an out-of-phase detecting circuit 4 and a switching circuit 7. The circuit 4 delivers an out-of-phase signal in case the frequency of the output signal of the circuit 3 is out of the prescribed range. At the same time, a clock switch signal generating circuit 5 is reset by the signal which is supplied through an input terminal 6 for signal source switch timing signal and set by the output signal of the circuit 4 to deliver an output signal to the circuit 7. |
申请公布号 |
JPS58127489(A) |
申请公布日期 |
1983.07.29 |
申请号 |
JP19820009837 |
申请日期 |
1982.01.25 |
申请人 |
NIPPON DENSHIN DENWA KOSHA |
发明人 |
KURODA HIDEO;TAKEGAWA NAOKI |
分类号 |
H04N7/24;H04N19/00;H04N19/50 |
主分类号 |
H04N7/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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