| 摘要 |
PURPOSE:To realize an inexpensive and highly efficient address extending system, by extending an N-bit space to a memory address of (N+M) bits. CONSTITUTION:A signal line 2 showing the validity of the address information indicates that the address information is set at the prescribed value. Registers 3a-3c are set only when a prescribed extended address designated by A5-A15 is set up. Coincidence circuits 5-7 decides that the upper 11 bits show prescribed values respectively in case the address space of a host processor is formed with 16 bits of A0-A15. On the other hand, the output of a register 3 is allotted to a chip selection line of a memory after the lines of A2-A4 designated by an address space of 10 bits are decoded. Therefore, an address using 10 bits can give an access up to a memory which is extended to a space that can be designated with (10+3) bits. |
