| 摘要 |
PURPOSE:To test a logic circuit having a multiplicity of pins at high speed, by providing, in an IC having a logic circuit and first terminals coupled to nodes thereof, second terminals, third terminals for supplying selecting signals, smaller in number than the first terminals, and a node selecting circuit disposed between the second terminals and the nodes. CONSTITUTION:With a mode selector MSC set into the probing mode, testing data are fed from a circuit B into FFs corresponding to any desired pads thereby to set all the data. After an internal logic state is established, the output data are delivered to the respective pads and compared with expected values to test all the pins thereby to complete a function test. In the case where device to be tested has 150 input pins, 150 output pins and 20 power source pins, i.e., a total of 320 pins, this constitution only requires 19 additional pins besides 20 power source pins. Accordingly, the number of used pads can be decreased, and the damage to a wafer can be reduced. In addition, it is possible to select any one of the FFs in probing, and when a new data is set, the operation can be effected by selecting only desired FFs. Therefore, an IC having a multiplicity of pins can be tested at high speed. |
