发明名称 INPUT/OUTPUT DEVICE CONTROLLING SYSTEM
摘要 PURPOSE:To execute common control, and to shorten operation time, by providing a signal generating means which separately controls plural input/output devices through a common bus from a main processor, and also controls the input/output devices as to each group or in the lump. CONSTITUTION:To a common bus 4 of a CPU1, plural groups, for instance, 2 groups of I/O groups 2, 3 are connected. Each group consists of I/Os 20-2n and 30-3n, respectively, each I/O register an exclusive address and address common to the groups, an exclusive instruction is inputted to the exclusive address from a full line 5, and an instruction common to the groups is transferred to each I/O from a broken line 12 through a common address register 11. In this way, the instructin common to each I/O can be transferred in the lump, and trouble and time required for the operation can be reduced.
申请公布号 JPS58114222(A) 申请公布日期 1983.07.07
申请号 JP19810214603 申请日期 1981.12.28
申请人 FUJITSU KK 发明人 AKITA JIYUUICHI
分类号 G06F13/14;G06F13/12 主分类号 G06F13/14
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