| 摘要 |
A digital data processor provides separate bit and word arithmetic and logic units 22, 20 and accumulators 18, 16 for processing data and executing instruction on a bit or word basis respectively. Separate instructions sets are provided for bit and word processing. The single bit instruction set includes instructions for execution by the single bit ALU-accumulator set for controlling I/O operations. The word instruction set includes instruction for execution by the word ALU- accumulator set for data transfer and manipulation. The address space 12 includes a region which may be addressed on both a bit and word basis. Each bit of the word accumulator is addressable by the bit instructions, thereby eliminating the need for mask operations. An example is described for performing a double frequency (F/2F) data separation operation. |
