Method of producing field effect transistors having very short channel length.

摘要

Methods for producing field effect transistor devices having very short channel length are described. A surface isolation pattern (12) in a semiconductor substrate (10) isolates device regions of the semiconductor within the substrate from one another. An insulating layer (16) destined to be the gate dielectric layer of the field effect transistor devices is formed over the isolation pattern (12). Then a first polycrystalline silicon layer (20) is formed thereover. A masking layer (22) such as silicon dioxide is then formed upon the first polycrystalline layer. The multilayer structure is etched to result in a patterned first polycrystalline silicon layer having substantially vertical sidewalls. A sub- micrometer thickness conductive layer (26') is formed on these vertical sidewalls. The patterned layer is then removed which leaves the pattern of sub-micrometer thickness conductive sidewall layer (26') portions of which extend across certain of the device regions. The sidewall conductive layer is utilized as the gate electrode of the field effect transistor devices.