发明名称 METHOD OF MAKING V-ISOLATION GROOVES BY OVER-FILLING WITH POLYCRYSTALLINE SILICON OF GRADED CONDUCTIVITY AND ETCHING
摘要 A groove having a semiconductor layer buried therein is formed on one main surface of a semiconductor substrate, said groove providing a region for separating adjacent semiconductor elements. In the first step, a groove is formed on the substrate surface, followed by depositing a semiconductor layer thick enough to fill the groove. A substantial difference in impurity concentration is provided between the semiconductor layer within the groove and the other region of the semiconductor layer. The semiconductor layer is selectively allowed to remain within the groove by utilizing the difference in impurity concentration.
申请公布号 US4391033(A) 申请公布日期 1983.07.05
申请号 US19810285507 申请日期 1981.07.21
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 SHINOZAKI, SATOSHI
分类号 H01L21/3213;H01L21/763;(IPC1-7):H01L21/20;H01L21/30 主分类号 H01L21/3213
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