| 摘要 |
PURPOSE:To eliminate the mutual interference of channel between memory cells, by providing an isolation region under the gate electrode of a writing control transistor, and obtain a dynamic gain type semiconductor memory with a large dynamic margin of the output voltage, by forming a gate structure into a double layer form. CONSTITUTION:The first layer gate electrode 11 is formed and patterned, and then an insulation layer 13 is formed in the periphery. Next, with the first layer gate electrode as a mask, phosphorus of inverse conductive type to a substrate is ion implanted, and succeedingly boron the same conductive type as the substrate is implanted. The former forms a channel 14 of a buried channel transistor 16, and the latter becomes a junction floating gate 15 which exists in the channel 14 and is electrically isolated from the periphery. Then, the second layer gate electrode 12 is formed, then, with it as a mask, As is ion implanted by an ion implantation method in a self-alignment process, and according a source region 15 and drain region 18 of a buried channel transistor 16 are obtained. A layer insulation film, a through hole and a metallization layer are formed resulting in the formation of a wiring layer. |
