发明名称 Circuit arrangement for detecting and correcting bit errors
摘要 To detect and correct bit errors in a digital information signal, particularly in PCM sound signal processing, a test word is used for checking the information signal for freedom from errors in a first error detection circuit (15). Checking an error signal (F), generated in a second error detection circuit (10), with the aid of the first or an error detection circuit (16) equal to the first one is a measure of the reliability of the test result of the first error detection circuit (15). <IMAGE>
申请公布号 DE3150927(A1) 申请公布日期 1983.06.30
申请号 DE19813150927 申请日期 1981.12.23
申请人 LICENTIA PATENT-VERWALTUNGS-GMBH 发明人 SCHOLZ,WERNER,DIPL.-ING.
分类号 G11B20/18;H04L1/00;(IPC1-7):H03K13/32;G06F11/10;G11C29/00;H04L1/24 主分类号 G11B20/18
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