发明名称 ERROR CORRECTABLE STORAGE DEVICE
摘要 PURPOSE:To use a check bit generating and error correcting integrated circuit in common without increasing the number of input and output pins, by providing a check bit correcting circuit and a write data switching circuit and performing partial writing. CONSTITUTION:A partial writing control circuit 360 controls the check bit correcting circuit 330 and write data switching circuit 532 connected between a writing-side check bit generating and error correcting integrated circuit 100 and a storage circuit 150. A syndrome signal and read data from a readout-side check bit generating and error correcting integrated circuit 200 are applied to circuits 330 and 532 respectively to use the circuit 200 in common without using the circuit 100, and partial writing to the circuit 150 is carried out without increasing the number of input and output pins of the circuit 200. Thus, the processing of a storage device is speeded up.
申请公布号 JPS58108100(A) 申请公布日期 1983.06.28
申请号 JP19810204802 申请日期 1981.12.18
申请人 NIPPON DENKI KK 发明人 KOBAYASHI HIDEHIKO
分类号 G06F12/16;G06F11/10 主分类号 G06F12/16
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