| 摘要 |
PURPOSE:To decrease the number of elements and to make the circuit compact, by constituting two sets of FFs having specified values through the use of an integrated injection logical circuit (I<2>L) gate, and obtaining a prescribed level of signals only when the outputs of the corresponding FFs are the same. CONSTITUTION:FF11-FF14, and FF21-FF24 are two sets of flip-flops of open collector output form consisting of I<2>L gates. To compare output signals A1- A4 in 4-bit of the FF11-FF14 and output signals B1-B4 in 4-bit, pair I<2>L gates G11, G12; G21, G22, G31, G32, and C41, G42 are provided. In this case, when the outputs of the two sets of FFs are equal, i.e., at A1=B1, A2=B2, A3=B3 and A4=B4, the output signal OUT is reduced to zero according to the De Morgan's theorem. |
