| 摘要 |
PURPOSE:To read out the contents of an RAM bit serial to a scan path at the maximum speed that is allowed for the shifting clock, by providing a detecting means which produces both the address addition signal and the bit position reset signal when the contents of a designated register means reach the prescribed value. CONSTITUTION:The contents of each bit at an address 0 of an RAM7 which designates the contents of an address register 1 emerges at the output 700 of the RAM7 and then supplied to a multiplexer 6. On the other hand, the contents of the bit of the multiplexer 6 at the bit position of an address 0 which is designated by the contents of a bit serial read register 3 set at 0 are read out to a multiplexer output 600. As a result, the bit of the 0-th address designated by the contents of the register 3 emerges at the output 600 and delivered to a scan path 900. Thus the contents of the RAM7 are read out to outside via the path 900 and up to the last bit of the last address. |
