发明名称 |
CHANNEL SWITCH CONTROL SYSTEM |
摘要 |
PURPOSE:To make the initial set easy and to avoid induced noise, by providing a memory for storage circuit storing control information to all cross points of a channel line matrix and writing control information of cross point in the matrix in this circuit. CONSTITUTION:Control information of all cross points 311-3lm in a channel matrix 5 connected among incoming lines 11-1l and outgoing lines 21-2m, is stored in storage memories 51-5l as a storage circuit. All horizontal cross point are written in one address in a memory 6 for switch control and a gate signal written in the memories 51-5l is transmitted from a signal forming circuit 7 in synchronizing with the transmission information of the memory 6. All the addresses are transmitted from the memory 6 within a prescribed period to the memories 5a-5l as control information repetitively, a gate signal synchronized with the circuit 7 is transmitted, the control of the cross points 311- 3lm of the matrix 5 is done with the memories 51-5l to facilitate initial setting. |
申请公布号 |
JPS58101593(A) |
申请公布日期 |
1983.06.16 |
申请号 |
JP19810200307 |
申请日期 |
1981.12.12 |
申请人 |
NIPPON DENSHIN DENWA KOSHA;NIPPON DENKI KK;HITACHI SEISAKUSHO KK;OKI DENKI KOGYO KK;FUJITSU KK |
发明人 |
TAKEI AKIRA;ONO CHIYUUKICHI;OOTSUKI KANEICHI;MIYAMOTO KOUICHI;YOSHINO HARUYUKI |
分类号 |
H04Q3/545;H04Q3/64;H04Q11/04 |
主分类号 |
H04Q3/545 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|