发明名称 Multi-computer system.
摘要 <p>A first computer (CA1) started periodically by a timer is connected to one of two sets of system buses (A, B), while a second computer (CA2) started upon receiving a command signal (C1, C2) from the first computer (CA1) through a first bus (E1) between the first and second computers in the normal state or started by a self timer with the command being lost, and transmitting a response signal (R1, R2) to the first computer after being started, is connected to the other system bus. These computers constitute a first dualized unit (D1) in which input processings and output processings to the system buses by two sets of the computers are synchronized through transmitting receiving of the command signal and the response signal using the first bus (E1). The system buses (A, B) also include a second dualized unit (D2) which is composed of a third computer (CA2) connected to one of the system buses (A, B) and a fourth computer (CB2) connected to the other system bus, and which is started upon receiving a signal from the first dualized unit (D1) through the system buses. For two sets of the computers in the first dualized unit (D1), timings of receiving external signals and timings of transmitted signals to the system buses are synchronized through the signal transmission using the first bus (E1). Similarly, a first bus is provided in the second dualized unit (D2), so that output timings therefrom are synchronized.</p>
申请公布号 EP0081238(A2) 申请公布日期 1983.06.15
申请号 EP19820111353 申请日期 1982.12.08
申请人 HITACHI, LTD. 发明人 ITO, AKIO;MIZOGUCHI, TSUTOMU;KANZAKI, HIDEO;HAYAKAWA, HIROHISA;KIMURA, KOICHI;AOTSU, HIROAKI
分类号 G06F11/16;(IPC1-7):06F11/16 主分类号 G06F11/16
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