| 摘要 |
PURPOSE:To reduce the device in width, by employing as the internal wiring only one kind of tape carrier of the same type, and inputting serial data inverted by an external circuit to cope with the fact that the serial data are inverted every n bits. CONSTITUTION:First, data synchronized with a clock signal are fed for one line successively from an external circuit. The data at that time are fed into a first n-bit shift register 603. When n bits is reached, the signal from a bit counter is received by a pulse forming circuit (a) constituted by an ''OR'' element 606 and an amplifier 607 and is fed as a load signal 612 into a second n-bit shift register 604. Thereupon, the data stored in the first n-bit shift register 603 are transferred to the second n-bit shift register 604. |
