发明名称 SUBTRACTING CIRCUIT
摘要 PURPOSE:To decrease the number of elements to facilitate the integration as well as to increase the accuracy, by using a current mirror circuit without applying an operational amplifier. CONSTITUTION:The voltages V1 and V2 are applied to the bases of the 1st and 2nd input transistors (TRs) 9 and 10 from the 1st and 2nd variable voltage sources 1 and 2 respectively. A current I1=(V1-V2)/R1 flows to the TR 9 and TR 10. At the same time, a current I1 is supplied to the collector side of a TR 11 which forms a pnp current mirror circuit, and a current AI1 is supplied to the collector side of a TR 12 of the other side. In addition, a current AI1 flows to the collector side of a TR 14 forming an npn current mirror circuit, and a current ABI1 flows to the collector side of a TR 13 of the other side. Then the voltage V0=I1XR2=R2(V1-V2)/R1 is led out of a load resistance 5 at the collector side of a TR 15.
申请公布号 JPS5897771(A) 申请公布日期 1983.06.10
申请号 JP19810198257 申请日期 1981.12.04
申请人 MITSUBISHI DENKI KK 发明人 SATO HARUNORI;SAKANO RIYUUICHI
分类号 G06G7/14 主分类号 G06G7/14
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