| 摘要 |
<p>In a modular type of data processor, it is advantageous that being processed be asynchronously transferred between modules with minimum required complexity and without detracting from overall processor performance. Instead of using the conventional approach of employing input and output queues or direct wiring between modules which result in the above disadvantages, the disclosed invention provides one or more modules, such as an execute module (16), with a randomly accessible scratchpad memory (26) which is logically divided into two switchable pages (26a) and (26b). During operation, one page can be written with new instruction data from a different module, such as a fetch module (10), while a previously written page is concurrently being read by the execute module for execution of a designated data processing operation. When the execute module completes execution and is ready for a new block of data, the two pages are rapidly switched by toggling a bit of the page address using a page flip-flop (32).</p> |
