发明名称 MOS TYPE LOGICAL CIRCUIT
摘要 PURPOSE:To eliminate excessive voltage margin and operating margin, by changing the relation between an input signal and an output signal at the range of no logical change, through the change of an output potential of a potential generating means. CONSTITUTION:When an output VO is a potential VH of a power supply voltage VDD side, an MOS transistor MOSTRQp2 is turned off. The equivalent circuit in this case is as shown in figure (b). The driving ability of the P channel is betap1 being a single MOSTRQp1 and that of the N channel is a betan1 being a single MOSTRQn1. When the VO becomes a potential VL at a ground potential VSS side, an MOSTRQp2 turns on and an MOSTRQp3 also turns on with the Vin at an L level, then two current paths from the VDD to Vout exist, and the equivalent circuit is shown in figure (c), and an inverter consisting of the MOS TRQp3 having a syanthesized beta value and the MOSTRQn1 having betan1. Thus, the selection branch is provided to the circuit operation and suitable circuit characteristics can be selected with nonvolatility.
申请公布号 JPS5896427(A) 申请公布日期 1983.06.08
申请号 JP19810194767 申请日期 1981.12.03
申请人 TOKYO SHIBAURA DENKI KK 发明人 KONISHI SATOSHI
分类号 H03K19/0948;H03K19/173 主分类号 H03K19/0948
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