| 摘要 |
PURPOSE:To decrease processing steps of editing mark instructions in number and to improve processing performance, by allowing the address of the 1st operand in a signified state to stand by in a register during an arithmetic loop, and writing it in a general register after the arithmetic loop ends. CONSTITUTION:Once significant starting in an arithmetic loop is detected, the contents of a store address register 4 are set in a work register 8 and after the arithmetic loop ends, its contents are written in a universal register 12. A control logical circuit S is provided in an arithmetic unit 3 and its signal line 201 is set to ''1'' since it is confirmed that the control code of the 1st operand is a number among corresponding pack form data 1-9, thereby requesting significant digit storage by an editing mark instruction. Then, a set command pulse for the register 8 is sent out to a signal line 206 and a latch 17 outputs a general register write indication signal to a signal line 207 to recognize it after arithmetic ends. |
