发明名称 GENERATING CIRCUIT OF DELAY CURRENT
摘要 PURPOSE:To obtain a delay current with a simple circuit, by connecting bases of two PNP transistors (TRs) the emitter of which is connected to a power supply via a common resistor, to a connecting point of voltage dividing resistors and that between a resistor and a capacitor. CONSTITUTION:Emitters of the 1st and 2nd PNP TRs 1, 2 are connected in common and connected to a power supply terminal via a common resistor 3. The collectors of the TRs 1, 2 are grounded via resistors 4, 5 respectively. The base of the TR1 is connected to a connecting point between resistors 6, 7 in series connection between the power supply and ground, and the base of the TR2 is connected to a connecting point between a resistor 8 and a capacitor 9 connected between the power supply and ground. In taking a voltage drop across the resistor 3 into account, when the base voltage is set higher than the emitter voltage of the TR1, after the power application, a voltage across the capacitor 9 is increased and after the TR2 is interrupted, then the TR1 is conductive.
申请公布号 JPS5896419(A) 申请公布日期 1983.06.08
申请号 JP19810195175 申请日期 1981.12.03
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KANAI TOSHIO
分类号 H03K17/28;(IPC1-7):03K17/28 主分类号 H03K17/28
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