发明名称 DATA PROCESSOR
摘要 PURPOSE:To shorten the reading time of an instruction for a small-scale instruction loop, by reading the instruction directly out of an instruction buffer while the branching conditions of a branch are satisfied. CONSTITUTION:For a small-scale instruction loop formed by a specific instruction loop, an instruction loop is assumed with a specific branch instruction. Then a detecting circuit 15 is provided to check whether the instruction loop can enter an instruction buffer 2. If the instruction loop can enter the buffer 2, the reading of an extra instruction is inhibited so that the entire instruction included in the loop can be held within the buffer 2 while the loop is carrying out a process. This can eliminated a delay of process which is caused while the instruction given from a buffer memory 1 is read and then stored in the buffer 2 and with each branching.
申请公布号 JPS5890244(A) 申请公布日期 1983.05.28
申请号 JP19810187022 申请日期 1981.11.24
申请人 HITACHI SEISAKUSHO KK 发明人 YAMAMOTO MICHITAKA
分类号 G06F9/32;G06F9/38 主分类号 G06F9/32
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