| 摘要 |
PURPOSE:To avoid an analog input voltage and an output voltage of a D/A converter from being remarkably made different from each other, by taking an A/D conversion data to a value at a full scale voltage, when the analog input voltage reaches the full scale or over. CONSTITUTION:When an analog input volage 1 is a full scale or an A/D converter 2 or over, an over-bit 3 is 1, an output of a tristate gate 15 is a high impedance, the data is taken to 1001 with pull-up resistors 20, 21 and pull-down resistors 22, 23 and outputted through an output buffer gate 8. When the analog input voltage is a full scale or below, the output of the A/D converter 2 is outputted as it is via the gate 8. In inputting the output signal to a D/A converter, even if the analog input voltage is full scale or over, the analog input voltage and the output voltage of the D/A converter are not made different greatly. |
