发明名称 PROCESSING SEQUENTIAL MANAGING SYSTEM
摘要 PURPOSE:To simplify the processing steps and to improve the processing efficiency, by eliminating the need for the recombination of links at the revision of address data accompanied with the generation of task. CONSTITUTION:A plurality of control blocks b1-b3 are arranged, addresses B1- B3 are assigned to the blocks b1-b3 respectively, and program arrangement address describing columns K1-K3 are provided, and the addresses B2, B3, B1 are set to links L1-L3. A cue terminal QT is arranged with columns H, E representing the address of a task control block(TCBO) and a counter column C. If a task is generated without the execution of a program P1, an arrangement address A1 of the program P1 is set to the column K1 of the block b1, the program P1 is adopted as a task, to wait for the execution. Thus, the processing steps can be simplified and the processing efficiency can be improved.
申请公布号 JPS5887634(A) 申请公布日期 1983.05.25
申请号 JP19810186511 申请日期 1981.11.20
申请人 FUJITSU KK 发明人 KIMOJI OSAMU;OKAMOTO KATSUHIKO
分类号 G06F9/46 主分类号 G06F9/46
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