发明名称 |
FLOATING GATE MEMORY CELL |
摘要 |
A memory cell includes a selection transistor and a memory transistor formed as insulated gate field effect transistors. The transistors are formed on a substrate with a channel for the selection transistor coupled to a channel for the memory transistor. A layer of oxide overlies both transistors. The channels are formed between a programming line and a reading line formed in the substrate. A thin film window in the oxide overlies a region of the programming line. An insulated, floating gate is formed overlying the window and the channel of the memory transistor. A gate electrode overlies the floating gate and the channel of the selection transistor. |
申请公布号 |
JPS5878468(A) |
申请公布日期 |
1983.05.12 |
申请号 |
JP19820183616 |
申请日期 |
1982.10.19 |
申请人 |
ITT IND INC |
发明人 |
FURITSUTSU GIYUNTAA ADAMU |
分类号 |
H01L27/112;G11C16/04;H01L21/8246;H01L21/8247;H01L29/788;H01L29/792 |
主分类号 |
H01L27/112 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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