| 摘要 |
PURPOSE:To prevent erroneous operation of a logic circuit by a method wherein a by-pass for collector current of a parasitic transistor is provided in relation to a load resistor constituting the logic circuit, and an output voltage of the logic circuit is made so as not to receive an influence thereof. CONSTITUTION:An N type epitaxial layer on a P type Si substrate 21 is divided P<+> type layers, a layer 27 is connected to an input signal terminal A of a logic signal, a layer 28 is earthed, and a layer 29 is connected to a signal output terminal Y and to a positive electric power source terminal VCC through the load resistor. At this constitution, when the voltage of the terminal A is reduced lower than earth potential, a parasitic N-P-N element Q consisting of the P type layer as a base, the N type layer 27 as an emitter, and an N type layer 28 as a collector is conducted. However a collector current of the element thereof is earthed through an N type layer 32 and an electrode 33, and because no current flows in the resistor R, the signal output terminal Y is not affected by the collector current thereof, and when the input terminal A is in a low voltage level, erroneous operation of a logic circuit wherein the signal output terminal Y is in a high voltage level can be prevented. |
