| 摘要 |
PURPOSE:To make word lines short and to decrease the access time, by providing a data input/output control circuit at both sides of cell arrays along the direction of data line in the memory cell arrays so as to read out or write data in many-bit at the same time. CONSTITUTION:An RAM of CMOS-IC, for example, has 36 pieces of memory cell arrays 300-335 having the storage capacity of 64-wordX1-bit. One memory cell array 300 includes 64 pieces of static memory cells of 32-rowX2-column and includes 32 word lines and two pairs of data lines 1,100, 1,101. A column switch 400 selecting the data line 1,100 of the array 300 and a column switch 401 of the array 301 are located at counter side of the array and data input/output control circuit 600 and 601 are also located at the counter side of the array. Thus, without producing useless space, the word lines can be decreased and the access time can be quickened. |
