发明名称 FORMATION OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To improve the performance of bipolar transistor remarkably reducing the turnaround time of bipolar process and the number of bipolar masks required by a method wherein the process of forming the separation region between elements is introduced. CONSTITUTION:The double epitaxial layer 10 comprising n type high concentration impurity layer 2a (concentration 10<20>-10<19>1/cm<3>, film thickness: 1-2mum) and n type concentration impurity layer 3a (concentration 10<17>-10<16>/1cm<3>, film thickness 1-2mum) to be element region and Si3N<4> layer 11 (thickness 0.1-0.3mum) to be oxidation resistant layer are formed on silicon p type semiconductor substrate 1 (concentration 10<15>-10<17>1/cm<3>). Firstly the mask layers 7 for etching with specified pattern are formed on the main surface of the double epitaxial layer 10 into element region. Secondly the separation grooves 9 are formed by means of removing said Ni3N4 layer 11 as oxidation resistant layer and double epitaxial layer 10 using etching process. Silicon layers 8, 8a are formed by means of sputtering to cover said mask layers 7 and separation grooves 9.
申请公布号 JPS5871640(A) 申请公布日期 1983.04.28
申请号 JP19810170205 申请日期 1981.10.26
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 HASEGAWA HIROHIKO;TERAJIMA MAKOTO;SHIBATA SHIGEO
分类号 H01L21/306;H01L21/316;H01L21/331;H01L21/76;H01L21/763;H01L29/73 主分类号 H01L21/306
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