| 摘要 |
PURPOSE:To reduce effectively the quantized noise to the frequency of a low level and to simplify the increase of the number of changing bits, by compensating the analog voltage produced centering on a changing point based on the shorter one of the 1st and 2nd times of the sampling period of information. CONSTITUTION:The supplied digital signal Dn is compared with the signal Dn-1 obtained from a shift register 1 before sampling through a comparator 4. Then the signal, which does not change during the 1st time which is equal to an integer-fold value of the sampling period and then changed into the information which is different at the changing point, is detected by a detecting circuit 5 with the outputs Qa and Qb. This information is fed to a read-only memory ROM. Then the analog voltage of the shorter one of the 1st and 2nd times and produced centering on the changing point is compensated based on the shorter time and by an ROM9, a latching circuit 11, an ROM12, a compensated voltage generating circuit 14, etc. in case the different information has no change during the 2nd time which is equivalent to an integer-fold value of the sampling period. The output of a D/A converter 3 is compensated by a mixer circuit 15. |
