| 摘要 |
PURPOSE:To perform the same monitor as an adaptor for a line not having a bit buffer, by adding an FIFO which can store a status signal. CONSTITUTION:A bit serial data (a) and a status signal (b) from an MODEM MD are stored in FIFOs 1 and 2 respectively in synchronizing with the transmission speed of a line, and an output data (a') of the FIFO 1 and an output signal (b') of the FIFO 2 are transmitted to a shift register SFR and an external control circuit DCEC under the control of a control circuit CNT. A parallel data (c) converted at the SFR is transmitted to a communication controller LC via a buffer BFR. Next, the signal (b') is transmitted to the device LC as a status signal (b''). As a result, the line adaptor LC can monitor and control the data signal. |
