发明名称 COMPLEMENTARY SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To improve the package efficiency and to reduce power consumption by adding circuits which freely selectively switch the supply of clock signals to plural functional packaged on one semiconductor integrated circuit device. CONSTITUTION:Circuit blocks 4-6 are divided by functions are each have a clock input terminal CLK, and gate circuits 21-23 supply clocks to their clock input terminals selectively. Then, control circuits 17-20 receive an external signal and control the selective clock supplying operation of the gate circuits 21-23. For example, write information is supplied to registers 18-20 for clock supply information storage through input terminals 11-13, and write pulses at that time are generated by decoding the combination of the terminals 14-16 through a decoder 17 and then supplied as strobe pulses to the registers 18-20 to store the clock supply information. Then, no clock is supplied to the unused blocks 5 and 6.</p>
申请公布号 JPS5851325(A) 申请公布日期 1983.03.26
申请号 JP19810149464 申请日期 1981.09.24
申请人 HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK 发明人 NAKAGAWA JIYUNICHI;MIZUKAMI MASAO;SUZUKI TOORU
分类号 H03K19/0948;G06F1/04 主分类号 H03K19/0948
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