| 摘要 |
PURPOSE:To obtain the logical element which can coexist with the analog circuit of high withstand voltage by a method wherein an epitaxial layer is made thicker, the base width of a PNP transistor is reduced using a buried boron layer, and a cut-off frequency is increased. CONSTITUTION:In the diagram, a buried boron (p type) is indicated by 8, and the bottom isolation layer using the buried boron is indicated by 8'. According to this example, the base width of a parasitic substrate PNP transistor Q2 is determined by the distance between the p type region 5 of an NPN transistor Q1 and the buried boron 8, and the base width can be controlled in a constant state by properly changing the heat treatment time even when an epitaxial layer was thickly formed, for example. Accordingly, the epitaxial layer 3 can be formed in the thickness with which the withstand voltage of the NPN transistor Q1 can be satisfied. |
