| 摘要 |
PURPOSE:To reduce the queuing for process as much as possible regardless of the discontinuation of a memory access, by having a chaining control so as to give an early process to the elements which are so far loaded. CONSTITUTION:A fetched instruction 1 is fed to a register 16 of a control part 36 through registers 10 and 12, a decoder 20, a register 14 and an instruction transmission control circuit 22. Then an instruction 2 is fetched and fed to the register 14 to inspect the instruction transmitting conditions. Here it is known that the instruction 2 is chained with the instruction 1. Thus the instruction 2 is made to wait at the register 14. When the execution of the instruction progresses, a flag WF is fed from a load processing part to close an AND gate 30 and to extinguish the instruction transmission waiting signal. Thus the instruction 2 is turned into the start information Sb through the circuit 22 and executed. In case an access is discontinued during execution of the instruction 1, the execution is discontinued also for the instruction 2. Then the non-chaining is detected by comparing means 24 and 26. As a result, the gate 30 opens to execute the instruction at once. |
