发明名称 CLOCK SWITCHING SYSTEM
摘要 PURPOSE:To avoid a continuous state of fault of a system, by performing the switching between the existing and spare clock supply devices when signal cutoff is detected for at least one of a basic clock signal, positive polarity pulse signal, negative polarity pulse signal and phase locking signal. CONSTITUTION:Plural bipolar signals supplied from the existing and spare clock supply devices 5-1 and 5-2 are converted into three signals of a basic clock, positive polarity pulse and negative polarity pulse through bipolar converting circuits 5-1 and 5-2. These pulses are fed to basic clock cutoff detecting circuits 5-5 and 5-6 as well as to bipolar violation detecting circuits 5-7 and 5-8. The cutoff detecting circuits 5-5, 5-6, 5-9 and 5-10 monitor the basic clock or the bipolar violation pulse. Then the cutoff of an input composite bipolar signal is decided in case the cutoff of the signal continues longer than the prescribed time. The selecting circuits 5-11 and 5-12 are controlled to perform the switching between the existing and spare clock supply devices.
申请公布号 JPS5843021(A) 申请公布日期 1983.03.12
申请号 JP19810141182 申请日期 1981.09.08
申请人 NIPPON DENKI KK 发明人 KATOU YOSHIBUMI;MIZUSAWA TSUNETOSHI
分类号 G06F11/18;G06F1/04 主分类号 G06F11/18
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