| 摘要 |
PURPOSE:To obtain a signal detection circuit which can detect an arbitrary number of address signals, by changing the number of stages of shift registers and feedback circuits according to a control signal. CONSTITUTION:When control signals 9m-1-92 and ''0'', the generating polynomial is expressed as 1+X+X<2> and when ''1'', the polynomial is 1+X<i1>+... +X<ij>+X<m>, where m is the number of stages of shift register and 1i...ij are number of stages of feedback circuits. When the control signals 9m-1-9m+j are ''1'', control signals 9m+j-1-92 are ''0'' and 10i1...10ij are ''0'', then the polynomial is 1+X<i1>+...+X<il>+X<j> (where; i1...ij<j<m). Since ''0'' or ''1'' is inputted to an input terminal 8, the types of detection signals to be produced are twice the summation of (2<i>-1) for i from 1 to (m-1), and signals excluding mode codes and loop constituting codes can be used as address signals. |
