发明名称 INTEGRATED CIRCUIT WITH METAL NITRIDE OXIDE SEMICONDUCTOR MEMORY CELL
摘要 PURPOSE:To stabilize characteristics when a Si gate CMOS and an Al gate MNOS element are formed onto the same substrate by extending the poly Si gate of an N channel CMOS element to the P<+> guard ring of a P<-> island and crossing the gate with the guard ring. CONSTITUTION:N<+> Source and drain 32, the poly Si gate 33 and metallic wiring 34 are shaped to the P<-> well of an N type Si substrate, and the poly Si 33 is crossed with a section on the P<+> guard ring 30 and extended onto the ring. When forming the gate oxide film of the MNOS memory cell, an interface level increases remarkably between the Si substrate and a SiO2 film through exposure in an O2 atmosphere having a low temperature, but the increase of interface level density can be prevented for the time being when the poly Si is deposited onto SiO2. When the poly Si is extended onto the P<+> guard ring 30 as shown in this constitution, leakage currents 35 bypassing the P<-> island 31 can be removed completely, and the N channel MOS does not leak and stable characteristics are obtained when the Si gate CMOS and the Al gate MNOS memory cell are shaped onto the same substrate.
申请公布号 JPS5840865(A) 申请公布日期 1983.03.09
申请号 JP19810139329 申请日期 1981.09.04
申请人 CITIZEN TOKEI KK 发明人 UCHINO MOTOYUKI;HAYAFUCHI KAZUNARI
分类号 H01L21/76;H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L21/76
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