发明名称 MEMORY ACCESS SYSTEM
摘要 PURPOSE:To send data to another processor without useless data transfer, by allowing respective plural processors to access both their local memories and local memories of the opposite connected processors. CONSTITUTION:A control processor 200 has a memory 210 as a local memory, and processors 201-204 also have memories 211-214 as local memories. The processors 201 and 202, and 203 and 204 are connected mutually through an interexchange channel 220. Consequently, the processor 201 handles the memory 212 connected externally to the memory 211, and the processor 202 handles the memory 212 and external memory 211. similarly, the processor 203 handles the memories 213 and 214, and the processor 204 handles the memories 214 and 213. Therefore, for example, when the processor 201 is to send data to the processor 202, the data are written at the upper side of the memory map of the processor 202 as they are only by writing the data at the lower side of the memory map of the processor 201, i.e. in the memory 212.
申请公布号 JPS5839360(A) 申请公布日期 1983.03.08
申请号 JP19810136127 申请日期 1981.09.01
申请人 TOKYO SHIBAURA DENKI KK 发明人 HITAI YUTAKA;KOYANAGI SHIGERU;IWATA KAZUHIDE;SHIBAYAMA SHIGEKI
分类号 G06F15/16;G06F12/00;G06F12/06;G06F15/167;G06F15/17;G06F15/177 主分类号 G06F15/16
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