| 摘要 |
PURPOSE:To exactly decide whether the functional characteristics are good or not, and to shorten its measuring time, by utilizing the output characteristics of a logical circuit device controlled by a polyphase clock. CONSTITUTION:An output outputted from a standard sample (STD) 3 is detected by an output detecting circuit 12, and by its detecting signal, a frequency dividing circuit 10 for frequency-dividing an external clock pulse to 1/3 is operated. The clock pulse which has been frequency-divided to 1/3 by this frequency dividing circuit is delayed by a delaying circuit 13 to a phase which is not concerned in each output generating operation of the STD3 and a sample to be measured DUT4, and is outputted. A delayed 1/3 frequency-divided pulse which has been synchronized with an external input clock pulse is outputted from the delaying circuit 13. This pulse is processed by a dissidence detecting pulse generating circuit 7, a dissidence detecting pulse is obtained, and whether the DUT4 is good or not is decided by applying said pulse to a dissidence detecting and deciding circuit 8. |
