| 摘要 |
PURPOSE:To eliminate ununiformity of writing levels different by bits by a method wherein, in a semiconductor integrated circuit including nonvolatile-memory transistors which have floating gate terminals respectively, writing can be performed on the same writing voltage and writing current for any memory transistor in cell matrices as well as electric current for writing is maintained at a lower value. CONSTITUTION:Common interconnection lines X1, X2...Xm are provided for the control gate terminals of nonvolatile-memory transistors; common interconnection lines Y1, Y2...Ym for the drain terminals of the same; and common interconnection lines Z1, Z2...Zm for the source terminals of the same. The gate terminals are connected to one of the common interconnection lines X1, X2...Xm for the control gate terminals of the said nonvolatile-memory transistors; the drain regions are connected to at least one of the common interconnection lines Z1, Z2...Zm for the source terminals of the said nonvolatile-memory transistors, and the source regions are provided with at least m units of MOS transistors which are formed on the same wafer as the said grounded nonvolatile-memory transistors. |
