| 摘要 |
An adaptive filter suitable for speech analysis which is constructable on a silicon chip. The filter has a single multiplier and a single adder in series together with appropriate registers or memories so that the output of the adder is either looped back to the adder itself or alternatively is looped, after a delay, to the multiplier so as to perform the operations of an all-zero digital lattice filter in computing a moving average, employing linear predictive coding. Another register provides the multiplier with the constant values typically associated with lattice filter coefficients. Preferably the multiplier is an M-stage pipeline multiplier so as to reduce the area necessary for its incorporation on a silicon chip. The filter accepts digital samples of the voice input and outputs a compressed data representation of the input. |
