发明名称 LOW-PASS FILTER FOR PLL SYNTHESIZER TUNER
摘要 PURPOSE:To improve the S/N ratio of a tuner and to optimize the relation between the S/N ratio and scanning time, by selecting the constant of an LPF in response to the reception band through the switching of the constant of the LPF with the output from a band switching circuit. CONSTITUTION:A synthesizer using a PLL is constituted with a VCO36, a buffer 37, a prescaler 38, a control circuit 39 equipped with a band switching circuit 60, and an LPF40. To the control circuit 39 of this PLL, an oscillating frequency from VCOs 42 and 52 of medium and long wavelength zones is applied, the frequency is frequency-divided and applied to a constant switching circuit 61 as band switching signals Sf, Sm and Sl from the switching circuit 60. The circuit 61 receiving the signals Sf, Sm and Sl selects and switches the constant of the LPF40 according to the respective reception band and applies them to the VCOs 36, 42 and 52 respectively to control the oscillating frequency and to change the sensitivity constant for tuning circuits 31, 41 and 51 corresponding to the respective reception bands.
申请公布号 JPS5810935(A) 申请公布日期 1983.01.21
申请号 JP19810109902 申请日期 1981.07.13
申请人 SHARP KK 发明人 HIROSE ISAMU
分类号 H03L7/18;H03H11/04;H03H11/12;H03L7/183;H03L7/187;H04B1/26 主分类号 H03L7/18
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