发明名称 ADDRESS DECODING SYSTEM
摘要 PURPOSE:To reduce the access time, by directly inputting an address to a decoding circuit and applying the output of this circuit to a signal storage circuit. CONSTITUTION:An address A0-n is first applied to a decoder DEC for decoding. An output *DEC0-n is applied to a terminal D of a flip-flop and stored with an address set clock CLK-E. As a result, decoding outputs DEC0E-CnE are obtained from an output Q' terminal of the flip-flop. This is mentioned for ''E side'' and this can also be applied to ''O side''. All the decoding signals DEC0O-CnO can be selected at memory refresh by inputting a refresh signal *REFCY to reset terminals R of the flip-flops.
申请公布号 JPS583188(A) 申请公布日期 1983.01.08
申请号 JP19810100875 申请日期 1981.06.29
申请人 FUJITSU KK 发明人 SUGIHARA SUMIKO;AIDA KOUICHI
分类号 G11C11/413;G11C8/00;G11C8/10 主分类号 G11C11/413
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