发明名称 ANALOG MULTIPLIER AND ITS DRIVING METHOD
摘要 PURPOSE:To reduce power consumption and to make an IC small-sized, by using a switched capacitor circuit consisting of 2 MOSFETs having the same characteristic, and operational amplifier, a switch and a capacitor. CONSTITUTION:An MOSFET 1 and 2 constitute a 4 quadrant analog multiplier. The first capacitor 43 and switch 44 are connected between an inverted input terminal 45 of an operational amplifier 42 and an output terminal 46, and constitute the first integrator. The second capacitor 48 and switch 49 are connected between an inverted input terminal 51 of an operational amplifier 47 and an output terminal 52, and constitute the second integrator. Between the output terminal of the first integrator and the output terminal of the second integrator, the third capacitor 50 having a capacity value which is equal to the first capacitor 43 of the first integrator is connected. The output terminal 52 of the operational amplifier 47 is connected to an output terminal 60 of the analog multiplier.
申请公布号 JPS583070(A) 申请公布日期 1983.01.08
申请号 JP19810101932 申请日期 1981.06.30
申请人 NIPPON DENKI KK 发明人 YASUMOTO MASAAKI
分类号 G06G7/163;G06G7/161 主分类号 G06G7/163
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