| 摘要 |
PURPOSE:To ensure an independent control for each element, by connecting in common the data input/output terminals of the storage elements and then feeding the clock and the mode control signal only to a data transfer element. CONSTITUTION:A mode control terminal M is set at a low level, and the data input/output terminal D of each of the memory elements 7-8 are set in the input state. In this case, ''mode data 1'' is fed serially to each terminal D so that the terminal D is set in an input state when the terminal M is set at a high level. Then the clock is fed to the terminal C of each element to transfer the data to each element. Then, for instance, ''mode data 2'' is fed to an element 9 through the terminal D, and the clock is fed only to the element 9. The ''mode data 2'' is transferred to set the element 9 in a control mode. After this, the terminal M is set at a high level to set each element in an execution mode. As a result, only the element 9 can be controlled independetly. The same control is given also to the elements 7 and 8. |
